IAR Systems I-jet® Trace for RISC-V provides extensive debugging and trace functionality for RISC-V devices with a trace interface based on the draft RISC-V Nexus Trace Specification. The I-jet Trace for RISC-V supports on-chip RAM buffered trace, in addition to fast JTAG, cJTAG, and DAP debug. With I-jet Trace and IAR Embedded Workbench® developers have full control of all active settings and the live trace status of the application. Also, function profiling makes it possible to see and analyze timing information for the functions in an application, while code coverage analysis shows the percentage of code that has been executed down to a single instruction resolution. These combined capabilities offer a non-intrusive and easy-to-use code optimization tool.

The IAR Systems I-jet Trace for RISC-V is designed to be controlled by the IAR C-SPY® Debugger included in the IAR Embedded Workbench for RISC-V IDE (Integrated Development Environment). The IAR Embedded Workbench is a complete toolchain with everything developers need in one single view, ensuring quality, reliability, and efficiency in embedded applications.